The semiconductor industry’s march toward post-quantum cryptography (PQC) has taken a significant step forward with the Caliptra Root of Trust (RoT) initiative – an open-source silicon security framework developed under the CHIPS Alliance.
At the heart of Caliptra’s cryptographic engine sits Adams Bridge, a hardware accelerator designed by Microsoft and other consortia members to implement the NIST-standardized ML-DSA (Module-Lattice-Based Digital Signature Algorithm) and ML-KEM (Module-Lattice-Based Key Encapsulation Mechanism) schemes. Adams Bridge represents a critical piece of infrastructure: it is the first open-source, industry-scale PQC accelerator targeting real-world deployment in hyperscale SoCs, offering unified acceleration for both signature and key-encapsulation operations within a single architecture.
The Bold Claims and the Harsh Reality
Adams Bridge was architected with side-channel resistance as a key design objective. The accelerator embeds hardware-level countermeasures including masking, coefficient-level shuffling, and constant-time execution, with empirical TVLA (Test Vector Leakage Assessment) evaluation performed across one million traces to validate the elimination of first-order leakage in critical datapaths.
Caliptra’s threat model explicitly focuses on non-profiled, multi-trace attacks such as Correlation Power Analysis (CPA), reasoning that Adams Bridge’s deployment context – embedded within power-dense, high-activity hyperscale SoCs – would inherently suppress the signal-to-noise ratio (SNR) required for more sophisticated profiled or SPA-style attacks. The design philosophy was clear: in a noisy environment, statistical averaging through CPA is the realistic adversarial vector, and the countermeasures were tuned accordingly.
When Theory Meets Practice
The problem with threat models is that they are only as strong as the assumptions they rest upon. In late 2024, researchers at Florida Atlantic University (FAU) demonstrated a successful Correlation Power Analysis (CPA) attack against Adams Bridge recovering secret keys in just 10,000 traces – a remarkably low bar for a design that claims million-trace TVLA validation.
The attack targeted the secret-key multiplication step within the ML-DSA signature generation path, exploiting the deterministic variant of the algorithm that Caliptra’s DICE certificate flow requires for reproducible identity derivation. This is not a theoretical vulnerability; it is a proven, practical key extraction against a production-intent PQC accelerator.
The FAU work, subsequently published at IEEE HOST 2025, exposed a fundamental tension: while Adams Bridge’s masking and shuffling are architecturally sound, the reality of physical implementation – particularly the movement and deserialization of plaintext secret keys during early pipeline stages—creates exploitable leakage windows that statistical countermeasures alone cannot fully close. Pre-silicon analysis has further confirmed that the biggest TVLA spikes occur precisely when the secret key is being moved about and transformed.
The eFPGA Imperative: Agility as the Ultimate Countermeasure
This is where Chameleon Semiconductor’s eFPGA technology fundamentally changes the equation. Static side-channel countermeasures—masking, shuffling, constant-time design – are necessary but insufficient because they are frozen at tape-out. Once an attacker characterizes the leakage profile of a fixed silicon implementation, the attack can be refined, optimized, and scaled. Chameleon’s eFPGA breaks this asymmetry by enabling runtime reconfiguration of the cryptographic datapath. Chameleon’s synthesized, software-defined eFPGA IP allows the physical implementation of sensitive operations – NTT butterflies, pointwise multiplications, secret-key deserialization- to be dynamically altered in the field, randomizing placement, routing, and timing characteristics on demand.
This is not merely obfuscation; it is architectural agility. Research on FPGA-based side-channel mitigation has demonstrated that dynamic partial reconfiguration (DPR) can disrupt power-analysis attacks by continuously varying the power consumption signature of the target logic, making it impossible for an adversary to build stable correlation models.
The Path Forward
Adams Bridge is an impressive engineering achievement, and its open-source nature is a commendable step toward transparent, verifiable hardware security. But the FAU attack is a sobering reminder that PQC hardware cannot be “secure by design” in a static sense – it must be secure by evolution.
The NIST PQC standards are new, the attack surface is still being mapped, and adversaries are only getting more capable. Chameleon Semiconductor’s eFPGA technology provides the cryptographic agility that static accelerators like Adams Bridge inherently lack: the ability to patch countermeasures, rotate implementations, and respond to newly discovered vulnerabilities without a silicon respin.
For Caliptra deployments and the broader ecosystem of PQC-enabled silicon, the lesson is clear. Post-quantum security is not a destination; it is a continuous process. And in that process, the ability to adapt is the only countermeasure that never becomes obsolete and is required for successful PQC deployment.
