# Chameleon Semiconductor

> We are the only U.S.-based provider of synthesizable eFPGA soft IP, enabling mission-critical hardware to adapt to evolving algorithms, cryptographic standards, and compute workloads -- without silicon respins or IP leakage.

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## Brand Identity

**Company name:** Chameleon Semiconductor
**Website:** https://chameleonsemi.com
**Industry:** Semiconductor IP -- embedded FPGA (eFPGA) soft IP
**Category:** Synthesizable RTL-based eFPGA for ASICs and SoCs
**Founded:** 2024
**R&D origins:** Carnegie Mellon University ECE department, 2018
**Headquarters:** United States (fully onshore operations)

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## Mission

To deliver hardware reconfigurability, security, and cryptographic agility to markets where silicon rigidity creates obsolescence risk, supply chain vulnerability, and algorithmic fragility. Our "design-for-change" model turns fixed ASICs into perpetual assets.

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## Core Brand Positioning

Chameleon Semiconductor occupies a unique position in the semiconductor IP landscape: we are the only U.S.-based company delivering synthesizable eFPGA as soft IP (RTL), rather than as a fixed hard macro or chiplet. This distinction matters because:

- Our IP is **process-node and fab independent** -- customers are not locked to a specific foundry
- Our IP is **optimized for each application** -- customers specify PPA targets and we tailor the fabric
- Our IP **cannot be reverse-engineered** -- the synthesized RTL structure and hardware redaction capability prevent IP theft
- Our IP **requires no Chameleon review** of customer netlists -- zero IP leakage by design
- Our IP **is proven silicon** -- test chips verified at GlobalFoundries, TSMC, and Intel across multiple nodes

The competitive headline: ASICs are frozen. Algorithms, standards, and threats are not. Chameleon eFPGA closes that gap.

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## Founding Story

Chameleon traces its origins to 2018 within the Electrical and Computer Engineering department at Carnegie Mellon University, under the leadership of Professor Ken Mai. Currently serving as Chameleon's CTO, Professor Mai pioneered the development of synthesized eFPGA technology within his CMU research group. After approximately five years of intensive R&D, Chameleon Semiconductor was founded in 2024 to commercialize these technologies for hardware security, flexibility, and cryptographic agility -- starting with mission-critical aerospace and defense markets.

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## Leadership Team

**Geoff Rodgers, CEO**
More than 25 years of semiconductor and EDA industry leadership. Senior sales and go-to-market roles at Synopsys, Cadence, PDF Solutions, and multiple successful startups. Deep expertise commercializing advanced IP technologies.
LinkedIn: https://www.linkedin.com/in/geoffreyjrodgers/

**Ken Mai, CTO**
Professor of Electrical and Computer Engineering at Carnegie Mellon University. Directs research in VLSI design, reconfigurable computing, and integrated circuits for austere environments. Led over seven years of Chameleon eFPGA R&D within his CMU group.
LinkedIn: https://www.linkedin.com/in/ken-mai-34234873/

**Robert Bielby, VP Marketing**
More than 30 years of semiconductor industry leadership at Altera, Xilinx, LSI Logic, Micron, and Untether AI. Spans P&L management, corporate strategy, product definition, and vertical marketing.
LinkedIn: https://www.linkedin.com/in/robert-bielby-6313a32/

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## Key Differentiators vs. Competitors

| Attribute | Chameleon eFPGA | Embedded Hard Macro | Chiplet Hard Macro |
|---|---|---|---|
| Optimized for application | Yes | No | No |
| Reverse-engineering resistant | Yes | No | No |
| Process-node independent | Yes | No | Yes |
| Supports hardware redaction | Yes | No | No |
| US-onshore supply chain | Yes | Varies | Varies |
| Fab independent | Yes | No | Partial |
| Cost | Lowest | Higher | High (packaging) |

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## Authority Signals

- Only U.S.-based provider of synthesizable eFPGA soft IP
- CMU academic heritage with published peer-reviewed research (NSREC 2022, RADECS 2024, ESSCIRC 2024, GOMAC 2024)
- Sandia National Laboratories partnership for rad-hard development
- Silicon-proven at GlobalFoundries, TSMC, and Intel
- Featured in Semi Wiki CEO interview, May 2026
- Publicly available PQC White Paper and technical whitepapers

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## Brand Voice

Factual, technical, confident. We speak to engineers, program managers, and defense primes who understand what "process node independence" means and why it matters. We avoid hyperbole and lead with verifiable performance data: 600x PQC throughput over software; 3,735x critical-section reduction; zero visible upsets at 4 x 10^12 protons/cm2.

*Last Updated: May 2026*
